Field of the Invention
The present invention relates to the development of control units, such as are used in the automotive industry or in the aviation industry, for example, for controlling technical systems such as, e.g., engines or brakes. In particular, the present invention relates to testers that are used in the development process for the control unit, for example, the electronic control unit of a vehicle.
Description of the Background Art
The development of control units has become a highly complex process. New control units and new control functions should thus be tested as early in the development process as possible in order to verify general functionality and to set the direction for further development. Towards the end of the development process, it is important to test the control unit, which has already undergone extensive development, as comprehensively as possible in order to make necessary modifications based on the test results before the control unit comes into use or enters mass production, so that it functions as desired under all conditions in later operation.
The methods of hardware-in-the-loop simulation (HIL simulation) and rapid control prototyping (RCP) are known for testing control units. In HIL simulation, an electronic control unit is connected to a tester (HIL simulator) on which a software model is executed, for example of the system to be controlled or regulated by the control unit. The software model is also referred to as an environment model. With it, the tester simulates for the control unit the physical environment of its future application. In RCP, in contrast, a software model of a control unit under development or undergoing improvement is executed on the tester. With the aid of the tester in the case of RCP, then, the technical system externally connected to the tester is regulated or controlled by means of the model executed on the tester.
The software models to be executed on the tester are becoming ever more complex. For this reason, RCP and HIL testers often have multiple processors or FPGAs (Field Programmable Gate Arrays) for parallel execution of different models or parts of models. The testers must be specifically configured for each model so that the models can be executed on the CPUs and FPGAs of the testers and can communicate, which is to say exchange data, with the technical systems that are connected. Until now, it has been necessary to perform this configuration manually. Depending on whether a model or a sub-model is to be executed on a processor or an FPGA of the tester, it has been necessary until now to manually perform very different steps for the configuration.